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NBVSBAXXX Series 2.5 V/3.3 V, LVPECL Voltage-Controlled Crystal Oscillator (VCXO) PureEdget Product Series
The NBVSBAXXX series voltage-controlled crystal oscillator (VCXO) devices are designed to meet today's requirements for 2.5 V and 3.3 V LVPECL clock generation applications. These devices use a high Q fundamental mode crystal and Phase Locked Loop (PLL) multiplier to provide a wide range of frequencies from 60 MHz to 700 MHz (factory configurable per user specifications) with a pullable range of 100 ppm and a frequency stability of 50 ppm. The silicon-based PureEdget products design provides users with exceptional frequency stability and reliability. They produce an ultra low jitter and phase noise LVPECL differential output. The NBVSBAXXX series are members of ON Semiconductor's PureEdget clock family that provides accurate and precision clock generation solutions. Available in the industry standard 5.0 x 7.0 x 1.8 mm and in a new 3.2 x 5.0 x 1.2 mm SMD (CLCC) package on 16 mm tape and reel in quantities of 1,000.
Features http://onsemi.com MARKING DIAGRAM
6 PIN CLCC LN SUFFIX CASE 848AB
NBVSBAXXX XXX.XXXX AAWLYYWWG
6 PIN CLCC LU SUFFIX CASE 848AC NBVSBAXXX XXX.XXXX AA WL YY WW G
NBVSBAXXX XXX.XXXX AAWLYYWWG
* * * * * * * * * * * * * * * *
LVPECL Differential Output Operating Range: 2.5 V 5%, 3.3 V 10% Ultra Low Jitter and Phase Noise - 0.5 ps (12 kHz - 20 MHz) Factory Configurable Frequencies from 60 MHz to 700 MHz (see Standard Frequencies in the Ordering Information Table in page 6) Pullable Range Minimum of 100 ppm Orderable Frequency Stability of 20 ppm or 50 ppm Control Voltage with Positive Slope Voltage Control Linearity of 10% Uses High Q Fundamental Mode Crystal Hermetically Sealed Ceramic SMD Package These Devices are Pb-Free and RoHS Compliant Networking SONET 10 Gigabit Ethernet Networking Base Stations Broadcasting
= NBVSBAXXX (50 ppm) = Output Frequency (MHz) = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
Applications
(c) Semiconductor Components Industries, LLC, 2010
June, 2010 - Rev. 0
1
Publication Order Number: NBVSBA011/D
NBVSBAXXX Series
VDD 6 CLK CLK 54
PLL Clock Multiplier
1 VC
2 OE
3 GND
Figure 1. Simplified Logic Diagram
VC OE GND 1 2 3 6 5 4 VDD CLK CLK
Figure 2. Pin Connections (Top View) Table 1. PIN DESCRIPTION
Pin No. 1 2 3 4 5 6 Symbol VC (Note 1) OE GND CLK CLK VDD I/O Analog Input LVTTL/LVCMOS Control Input Power Supply LVPECL Output LVPECL Output Power Supply Description Analog control voltage input pin that adjusts output oscillation frequency. f0 =VC = 1.65 V Output Enable Pin. When left floating pin defaults to logic HIGH and output is active. See OE pin description Table 2. Ground at 0 V. Electrical and Case Ground. Non-Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to VTT = VDD - 2 V. Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to VTT = VDD - 2 V. Positive Power Supply Voltage. Voltage should not exceed 2.5 V 5% and 3.3 V 10%.
1. Control voltage has a positive slope with a linearity of 10%; VC = 1.65 V 1 V.
Table 2. OUTPUT ENABLE TRI-STATE FUNCTION
OE Pin Open HIGH Level LOW Level Output Pins Active Active High Z
Table 3. ATTRIBUTES
Characteristic Internal Default State Resistor ESD Protection Human Body Model Machine Model Value 170 kW 2 kV 200 V
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test 2. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
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NBVSBAXXX Series
Table 4. MAXIMUM RATINGS
Symbol VDD VIN Iout TA Tstg Tsol Parameter Positive Power Supply Control Input (VC and OE) LVPECL Output Current Operating Temperature Range Storage Temperature Range Wave Solder See Figure 4 Continuous Surge Condition 1 GND = 0 V VIN VDD + 200 mV VIN GND - 200 mV 25 50 -40 to +85 -55 to +120 260 Condition 2 Rating 4.6 Units V V mA C C C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Table 5. DC CHARACTERISTICS (VDD = 2.5 V 5%; 3.3 V 10%, GND = 0 V, TA = -40C to +85C) (Note 3)
Symbol IDD VIH VIL IIH IIL VOH VOL VOUTPP Characteristic Power Supply Current Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current Output HIGH Voltage Output LOW Voltage Output Voltage Amplitude OE OE OE OE 2000 GND - 200 -100 -100 VDD-1195 VDD-1945 700 Conditions Min. Typ. 90 Max. 110 VDD 800 +100 +100 VDD-945 VDD-1600 Units mA mV mV mA mA mV mV mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Measurement taken with outputs terminated with 50 W to VDD - 2.0 V. See Figure 3.
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NBVSBAXXX Series
Table 6. AC CHARACTERISTICS (VDD = 2.5 5%, VDD = 3.3 10%, GND = 0 V, TA = -40C to +85C)
Symbol fCLKOUT Characteristic Output Clock Frequency Conditions NBVSBA011 NBVSBA027 NBVSBA018 NBVSBA017 NBVSBA015 NBVSBA024 NBVSBA026 Df tjit(f) tjitter Frequency Stability RMS Phase Jitter Cycle to Cycle, RMS Cycle to Cycle, Peak-to-Peak Period, RMS Period, Peak-to-Peak tOE/OD FP VC(bw) tDUTY_CYCLE tR tF tstart Output Enable/Disable Time Crystal Pullability (Note 4) Control Voltage Bandwidth Output Clock Duty Cycle (Measured at Cross Point) Output Rise Time (20% and 80%) Output Fall Time (80% and 20%) Start-up Time Aging 1st Year 1st 0 VC 3.3 V - 3 dB 100 20 45 50 245 245 1 55 400 400 5 3 1 (Note 5) 12 kHz to 20 MHz 1000 Cycles 1000 Cycles 10,000 Cycles 10,000 Cycles 0.5 2 10 1 6 Min. Typ. 122.88 148.50 155.52 156.25 200.00 622.08 644.53 50 0.9 8 30 4 20 200 ppm ps ps ps ps ps ns ppm KHz % ps ps ms ppm Max. Units MHz
Every Year After
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Gain transfer is positive with a rate of 95 ppm/V. 5. Parameter guarantees 10 years of aging. Includes initial stability at 25C, shock, vibration and first year aging.
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NBVSBAXXX Series
Table 7. PHASE NOISE PERFORMANCE
011 Parameter fNOISE Characteristic Output Phase-Noise Performance Condition 100 Hz offset 1 kHz offset 10 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 122.88 MHZ -90 -118 -127 -127 -134 -160 027 148.50 MHz -90 -118 -127 -127 -134 -160 018 155.52 MHz -90 -116 -126 -126 -134 -160 017 156.25 MHZ -90 -116 -126 -126 -134 -160 015 200.00 MHz -87 -114 -125 -125 -132 -158 024 622.08 MHZ -80 -106 -117 -117 -122 -150 026 644.53 MHZ -86 -107 -116 -116 -125 -150 Units dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz
Table 8. RELIABILITY COMPLIANCE
Parameter Shock Solderability Vibration Solvent Resistance Thermal Shock Moisture Level Sensitivity Mechanical Mechanical Mechanical Mechanical Environment Environment NBVSXXXXX Q Driver Device Q Zo = 50 W 50 W 50 W IN Zo = 50 W IN Receiver Device Standard Method MIL-STD-833, Method 2002, Condition B MIL-STD-833, Method 2003 MIL-STD-833, Method 2007, Condition A MIL-STD-202, Method 215 MIL-STD-833, Method 1011, Condition A MSL1 260C per IPC/JEDEC J-STD-020D
VTT VTT = VDD - 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
Temperature (C) 260 217
temp. 260C 20 - 40 sec. max. peak 3C/sec. max. ramp-up
6C/sec. max.
cooling
175 150
pre-heat reflow 60180 sec. 60150 sec. Time
Figure 4. Recommended Reflow Soldering Profile http://onsemi.com
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NBVSBAXXX Series
Table 9. ORDERING INFORMATION
Device Output Frequency (MHz) 5.0 x 7.0 x 1.8 mm NBVSBA011LN1TAG NBVSBA027LN1TAG NBVSBA018LN1TAG NBVSBA017LN1TAG NBVSBA015LN1TAG NBVSBA024LN1TAG NBVSBA026LN1TAG 122.88 148.50 155.52 156.25 200.00 622.08 644.53 CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free 3.2 x 5.0 x 1.2 mm NBVSBA011LU1TAG* NBVSBA027LU1TAG* NBVSBA018LU1TAG* NBVSBA017LU1TAG* NBVSBA015LU1TAG* NBVSBA024LU1TAG* NBVSBA026LU1TAG* 122.88 148.50 155.52 156.25 200.00 622.08 644.53 CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free CLCC-6, Pb-Free 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel Package Shipping
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and Reel Packaging Specification Brochure, BRD8011/D. *Consult factory for availability.
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NBVSBAXXX Series
PACKAGE DIMENSIONS
6 PIN CLCC, 7x5, 2.54P CASE 848AB-01 ISSUE O
D
4X
A
0.15 C
D1
B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. DIM A A1 A2 A3 b D D1 D2 D3 E E1 E2 E3 e L R MIN 1.70 0.08 1.30 6.17 6.66 4.37 4.65 1.17 MILLIMETERS NOM MAX 1.80 1.90 0.70 REF 0.36 REF 0.10 0.12 1.40 1.50 7.00 BSC 6.20 6.23 6.81 6.96 5.08 BSC 5.00 BSC 4.40 4.43 4.80 4.95 3.49 BSC 2.54 BSC 1.27 1.37 0.70 REF
TERMINAL 1 INDICATOR
E2
E1
E
D2 TOP VIEW A3 0.10 C A A1 SIDE VIEW D3
1 2 3 SEATING PLANE
A2
C
SOLDERING FOOTPRINT*
e
R
E3
1.50
6X
5.06
0.10 C A B 0.05 C
6X
b
6
5
4 6X
L 2.54 PITCH
BOTTOM VIEW
1.50
DIMENSION: MILLIMETERS
6X
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NBVSBAXXX Series
PACKAGE DIMENSIONS
6 PIN CLCC, 5x3.2, 1.27P CASE 848AC-01 ISSUE O
D D1
PIN ONE REFERENCE 2X 2X
A
B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. DIM A A1 A3 b D D1 E E1 E2 e L MILLIMETERS MIN MAX 1.05 1.35 0.35 0.65 0.90 REF 0.50 0.80 5.00 BSC 4.25 4.55 3.20 BSC 2.45 2.75 2.90 3.20 1.27 BSC 0.75 1.05
E1 E
0.15 C 0.15 C TOP VIEW
0.10 C A A1
METALLIZED ZONES
A3 C
SEATING PLANE
SOLDERING FOOTPRINT*
6X
SIDE VIEW
1
0.74
1.13
6X
E2 3.30
6X
L
6X
b 0.10 C A B 0.05 C
PACKAGE OUTLINE
e BOTTOM VIEW
1 1.27 PITCH
DIMENSION: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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NBVSBA011/D

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